From 038ef4577d5f71c90d426139ea77b519def8bca9 Mon Sep 17 00:00:00 2001 From: Wynter Woods Date: Wed, 2 Nov 2016 20:33:21 -0700 Subject: [PATCH] chip-pro-bootfast --- arch/arm/dts/sun5i-r8-chip.dts | 85 ++++++++++------------------ arch/arm/dts/sun5i-r8.dtsi | 32 +---------- arch/arm/dts/sun5i.dtsi | 123 ++++++++++++++++------------------------- configs/chippro_defconfig | 32 +++++++++++ include/configs/sunxi-common.h | 40 ++++++++++++++ 5 files changed, 152 insertions(+), 160 deletions(-) create mode 100644 configs/chippro_defconfig diff --git a/arch/arm/dts/sun5i-r8-chip.dts b/arch/arm/dts/sun5i-r8-chip.dts index 7a8cc27..329b238 100644 --- a/arch/arm/dts/sun5i-r8-chip.dts +++ b/arch/arm/dts/sun5i-r8-chip.dts @@ -52,44 +52,28 @@ / { model = "NextThing C.H.I.P."; - compatible = "nextthing,chip", "allwinner,sun5i-r8", "allwinner,sun5i-a13"; + compatible = "nextthing,chip", "allwinner,sun5i-r8"; aliases { i2c0 = &i2c0; i2c2 = &i2c2; serial0 = &uart1; serial1 = &uart3; + w10 = &w1; }; chosen { stdout-path = "serial0:115200n8"; }; - wifi_reg_on: wifi_reg_on { - compatible = "regulator-fixed"; + w1: onewire { + compatible = "w1-gpio"; + gpios = <&pio 3 2 GPIO_ACTIVE_HIGH>; /* PD2 */ pinctrl-names = "default"; - pinctrl-0 = <&chip_wifi_reg_on_pin>; - - regulator-name = "wifi-reg-on"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&pio 2 19 GPIO_ACTIVE_HIGH>; /* PC19 */ - enable-active-high; + pinctrl-0 = <&chip_w1_pin>; }; }; -&be0 { - status = "okay"; -}; - -&codec { - status = "okay"; -}; - -&cpu0 { - cpu-supply = <®_dcdc2>; -}; - &ehci0 { status = "okay"; }; @@ -133,19 +117,30 @@ }; }; -&mmc0_pins_a { - allwinner,pull = ; -}; - &mmc0 { pinctrl-names = "default"; pinctrl-0 = <&mmc0_pins_a>; - vmmc-supply = <&wifi_reg_on>; + vmmc-supply = <®_vcc3v3>; bus-width = <4>; non-removable; status = "okay"; }; +&nfc { + pinctrl-names = "default"; + pinctrl-0 = <&nand_pins_a &nand_cs0_pins_a &nand_rb0_pins_a>; + status = "okay"; + + nand@0 { + #address-cells = <2>; + #size-cells = <2>; + reg = <0>; + allwinner,rb = <0>; + nand-ecc-mode = "hw"; + nand-on-flash-bbt; + }; +}; + &ohci0 { status = "okay"; }; @@ -162,19 +157,19 @@ allwinner,pull = ; }; - chip_wifi_reg_on_pin: chip_wifi_reg_on_pin@0 { - allwinner,pins = "PC19"; - allwinner,function = "gpio_out"; - allwinner,drive = ; - allwinner,pull = ; - }; - chip_id_det_pin: chip_id_det_pin@0 { allwinner,pins = "PG2"; allwinner,function = "gpio_in"; allwinner,drive = ; allwinner,pull = ; }; + + chip_w1_pin: chip_w1_pin@0 { + allwinner,pins = "PD2"; + allwinner,function = "gpio_in"; + allwinner,drive = ; + allwinner,pull = ; + }; }; ®_dcdc2 { @@ -202,20 +197,6 @@ regulator-always-on; }; -®_ldo3 { - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vdd-wifi1"; - regulator-always-on; -}; - -®_ldo4 { - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vdd-wifi2"; - regulator-always-on; -}; - ®_ldo5 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; @@ -229,14 +210,6 @@ status = "okay"; }; -&tcon0 { - status = "okay"; -}; - -&tve0 { - status = "okay"; -}; - &uart1 { pinctrl-names = "default"; pinctrl-0 = <&uart1_pins_b>; diff --git a/arch/arm/dts/sun5i-r8.dtsi b/arch/arm/dts/sun5i-r8.dtsi index 8b058f5..0ef8656 100644 --- a/arch/arm/dts/sun5i-r8.dtsi +++ b/arch/arm/dts/sun5i-r8.dtsi @@ -51,37 +51,9 @@ compatible = "allwinner,simple-framebuffer", "simple-framebuffer"; allwinner,pipeline = "de_be0-lcd0-tve0"; - clocks = <&ahb_gates 34>, <&ahb_gates 36>, - <&ahb_gates 44>, <&de_be_clk>, - <&tcon_ch1_clk>, <&dram_gates 26>; + clocks = <&pll5 1>, <&ahb_gates 34>, <&ahb_gates 36>, + <&ahb_gates 44>; status = "disabled"; }; }; - - soc@01c00000 { - tve0: tv-encoder@01c0a000 { - compatible = "allwinner,sun4i-a10-tv-encoder"; - reg = <0x01c0a000 0x1000>; - clocks = <&ahb_gates 34>; - resets = <&tcon_ch0_clk 0>; - status = "disabled"; - - port { - #address-cells = <1>; - #size-cells = <0>; - - tve0_in_tcon0: endpoint@0 { - reg = <0>; - remote-endpoint = <&tcon0_out_tve0>; - }; - }; - }; - }; -}; - -&tcon0_out { - tcon0_out_tve0: endpoint@1 { - reg = <1>; - remote-endpoint = <&tve0_in_tcon0>; - }; }; diff --git a/arch/arm/dts/sun5i.dtsi b/arch/arm/dts/sun5i.dtsi index e374f4f..8bd718e 100644 --- a/arch/arm/dts/sun5i.dtsi +++ b/arch/arm/dts/sun5i.dtsi @@ -44,7 +44,6 @@ #include "skeleton.dtsi" -#include #include #include @@ -88,15 +87,6 @@ clock-output-names = "osc24M"; }; - osc3M: osc3M_clk { - compatible = "fixed-factor-clock"; - #clock-cells = <0>; - clock-div = <8>; - clock-mult = <1>; - clocks = <&osc24M>; - clock-output-names = "osc3M"; - }; - osc32k: clk@0 { #clock-cells = <0>; compatible = "fixed-clock"; @@ -112,32 +102,6 @@ clock-output-names = "pll1"; }; - pll2: clk@01c20008 { - #clock-cells = <1>; - compatible = "allwinner,sun5i-a13-pll2-clk"; - reg = <0x01c20008 0x8>; - clocks = <&osc24M>; - clock-output-names = "pll2-1x", "pll2-2x", - "pll2-4x", "pll2-8x"; - }; - - pll3: clk@01c20010 { - #clock-cells = <0>; - compatible = "allwinner,sun4i-a10-pll3-clk"; - reg = <0x01c20010 0x4>; - clocks = <&osc3M>; - clock-output-names = "pll3"; - }; - - pll3x2: pll3x2_clk { - compatible = "allwinner,sun4i-a10-pll3-2x-clk", "fixed-factor-clock"; - #clock-cells = <0>; - clock-div = <1>; - clock-mult = <2>; - clocks = <&pll3>; - clock-output-names = "pll3-2x"; - }; - pll4: clk@01c20018 { #clock-cells = <0>; compatible = "allwinner,sun4i-a10-pll1-clk"; @@ -162,23 +126,6 @@ clock-output-names = "pll6_sata", "pll6_other", "pll6"; }; - pll7: clk@01c20030 { - #clock-cells = <0>; - compatible = "allwinner,sun4i-a10-pll3-clk"; - reg = <0x01c20030 0x4>; - clocks = <&osc3M>; - clock-output-names = "pll7"; - }; - - pll7x2: pll7x2_clk { - compatible = "fixed-factor-clock"; - #clock-cells = <0>; - clock-div = <1>; - clock-mult = <2>; - clocks = <&pll7>; - clock-output-names = "pll7-2x"; - }; - /* dummy is 200M */ cpu: cpu@01c20054 { #clock-cells = <0>; @@ -338,14 +285,6 @@ clock-output-names = "usb_ohci0", "usb_phy"; }; - codec_clk: clk@01c20140 { - #clock-cells = <0>; - compatible = "allwinner,sun4i-a10-codec-clk"; - reg = <0x01c20140 0x4>; - clocks = <&pll2 SUN4I_A10_PLL2_1X>; - clock-output-names = "codec"; - }; - mbus_clk: clk@01c2015c { #clock-cells = <0>; compatible = "allwinner,sun5i-a13-mbus-clk"; @@ -399,6 +338,17 @@ #dma-cells = <2>; }; + nfc: nand@01c03000 { + compatible = "allwinner,sun4i-a10-nand"; + reg = <0x01c03000 0x1000>; + interrupts = <37>; + clocks = <&ahb_gates 13>, <&nand_clk>; + clock-names = "ahb", "mod"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + spi0: spi@01c05000 { compatible = "allwinner,sun4i-a10-spi"; reg = <0x01c05000 0x1000>; @@ -591,6 +541,44 @@ allwinner,pull = ; }; + nand_pins_a: nand_base0@0 { + allwinner,pins = "PC0", "PC1", "PC2", + "PC5", "PC8", "PC9", "PC10", + "PC11", "PC12", "PC13", "PC14", + "PC15"; + allwinner,function = "nand0"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; + + nand_cs0_pins_a: nand_cs@0 { + allwinner,pins = "PC4"; + allwinner,function = "nand0"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; + + nand_cs1_pins_a: nand_cs@1 { + allwinner,pins = "PC3"; + allwinner,function = "nand0"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; + + nand_rb0_pins_a: nand_rb@0 { + allwinner,pins = "PC6"; + allwinner,function = "nand0"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; + + nand_rb1_pins_a: nand_rb@1 { + allwinner,pins = "PC7"; + allwinner,function = "nand0"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; + uart3_pins_a: uart3@0 { allwinner,pins = "PG9", "PG10"; allwinner,function = "uart3"; @@ -632,19 +620,6 @@ status = "disabled"; }; - codec: codec@01c22c00 { - #sound-dai-cells = <0>; - compatible = "allwinner,sun4i-a10-codec"; - reg = <0x01c22c00 0x40>; - interrupts = <30>; - clocks = <&apb0_gates 0>, <&codec_clk>; - clock-names = "apb", "codec"; - dmas = <&dma SUN4I_DMA_NORMAL 19>, - <&dma SUN4I_DMA_NORMAL 19>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - sid: eeprom@01c23800 { compatible = "allwinner,sun4i-a10-sid"; reg = <0x01c23800 0x10>; diff --git a/configs/chippro_defconfig b/configs/chippro_defconfig new file mode 100644 index 0000000..a6a5169 --- /dev/null +++ b/configs/chippro_defconfig @@ -0,0 +1,32 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN5I=y +CONFIG_DRAM_TPR3=0x0 +CONFIG_DRAM_DQS_GATING_DELAY=0x0 +CONFIG_DRAM_TIMINGS_DDR3_800E_1066G_1333J=y +# CONFIG_MMC is not set +CONFIG_USB0_VBUS_PIN="PB10" +CONFIG_I2C1_ENABLE=y +CONFIG_AXP_GPIO=y +# CONFIG_VIDEO is not set +CONFIG_DEFAULT_DEVICE_TREE="sun5i-r8-chip" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2,ENV_IS_IN_NAND" +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FPGA is not set +CONFIG_CMD_GPIO=y +# CONFIG_CMD_NFS is not set +CONFIG_BOOTSTAGE_USER_COUNT=0x20 +CONFIG_BOOTSTAGE_STASH_ADDR=0x0 +CONFIG_BOOTSTAGE_STASH_SIZE=0x4096 +CONFIG_NAND_SUNXI=y +CONFIG_SPL_NAND_U_BOOT_OFFS=0x800000 +CONFIG_AXP_ALDO3_VOLT=3300 +CONFIG_AXP_ALDO4_VOLT=3300 +CONFIG_USB_MUSB_GADGET=y +CONFIG_VIDEO_CHRONTEL_CH7033_I2C_BUS=1 +CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 708ab17..91dfa04 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -383,6 +383,7 @@ extern int soft_i2c_gpio_scl; #if !defined CONFIG_ENV_IS_IN_MMC && \ !defined CONFIG_ENV_IS_IN_NAND && \ !defined CONFIG_ENV_IS_IN_FAT && \ + !defined CONFIG_ENV_IS_IN_UBI && \ !defined CONFIG_ENV_IS_IN_SPI_FLASH #define CONFIG_ENV_IS_NOWHERE #endif @@ -534,6 +535,45 @@ extern int soft_i2c_gpio_scl; BOOTCMD_SUNXI_COMPAT \ BOOTENV +#ifdef CONFIG_CHIPPRO_BOOT_FAST +#undef BOOT_TARGET_DEVICES +#define BOOT_TARGET_DEVICES(func) \ + "mount_ubi read_ubi boot_kernel\0" \ + "bootcmd=run distro_bootcmd\0" \ + "bootcmd_boot_kernel=bootz 0x42000000 - 0x43000000\0" \ + "bootcmd_mount_ubi=ubi part UBI\0" \ + "bootcmd_read_ubi=ubi read $kernel_addr_r kernel; ubi read $fdt_addr_r fdt\0 + +#undef CONFIG_EXTRA_ENV_SETTINGS +#define CONFIG_EXTRA_ENV_SETTINGS \ + CONSOLE_ENV_SETTINGS \ + MEM_LAYOUT_ENV_SETTINGS \ + DFU_ALT_INFO_RAM \ + "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ + "console=ttyS0,115200\0" \ + "usbnet_devaddr=de:ad:be:af:00:01\0" \ + BOOTCMD_SUNXI_COMPAT \ + "usbnet_devaddr=de:ad:be:af:00:01\0" \ + "mtdids=nand0=sunxi-nand.0\0" \ + "mtdparts=mtdparts=sunxi-nand.0:256k(spl0),256k(spl1),256k(spl2),256k(spl3),256k(spl4),256k(spl5),256k(spl6),256k(spl7),128m(ubi)\0" \ + "distro_bootcmd=for target in ${boot_targets}; do run bootcmd_${target}; done\0" \ + "bootargs=lpj=5009408 quiet ubi.fm_autoconvert=1\0" \ + "bootdelay=1\0" \ + "verify=n\0" \ + "silent=0\0" \ + BOOTENV + +#if defined(CONFIG_ENV_IS_IN_UBI) +#define CONFIG_ENV_UBI_PART "UBI" +#define CONFIG_ENV_UBI_VOLUME "env" +#define CONFIG_ENV_SIZE 0x400000 +#endif +#define CONFIG_SILENT_CONSOLE +#define CONFIG_SYS_DEVICE_NULLDEV +#define CONFIG_SILENT_CONSOLE_UPDATE_ON_RELOC + +#endif + #else /* ifndef CONFIG_SPL_BUILD */ #define CONFIG_EXTRA_ENV_SETTINGS #endif -- 2.7.4