
===========================
TEST 4  -  16K RAM TEST
===========================

Step 1. Performs CPU test - halt on fail
Step 2. Verifies that 8 bit checksum of ROM is 00 - halt on fail
Step 3. Timer 1 - verify that it functions okay
Step 4. Timer 1 - set it up to refresh memory
Step 5. 8237 DMA initialisation and test - halt on fail
Step 6. Test first 16K of RAM

If 16K block of RAM is good, "99" is displayed on POST card, else:
00 indicates the parity chip
01 indicates the bit 0 chip
02 indicates the bit 1 chip
04 indicates the bit 2 chip
08 indicates the bit 3 chip
10 indicates the bit 4 chip
20 indicates the bit 5 chip
40 indicates the bit 6 chip
80 indicates the bit 7 chip

Something else is a multi-bit failure. E.g. 50 indicates bits 4 and 6

5150 motherboard RAM bank layout: P _ 0 1 2 3 4 5 6 7

Note: On a good 64-256k board, you may see "AA" then "75" temporarily before you see either 00/01/02/04/08/10/20/40/80/99


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PROGRAMMING INFO

Based on the 27OCT82 version of the BIOS chip, U33.
The following code was substitued at offset 014B.
U33 appears at FE000 and so for example, offset 0123 will be address FE123 in the machine.

Note that the stack pointer points to ROM not RAM. Pointing to RAM is risky because
1. we don't know how much RAM is in the machine (i.e. valid RAM address range), and
2. the RAM might be faulty (the purpose of this test).
We can point to ROM because we're not PUSH'ing, only POP'ing.


OFFSET CODE         
------------------------------------------------
014B   90 90 90                       ; 90 is a NOP
014E   90 90
0150   90 90
0152   90 90
0154   BB 00 00      MOV BX,0000H     ; set to "BB 00 00" for first 16k (0-16), "BB 00 04" for second 16k (16-32),
                                      ; "BB 00 08" for third 16k (32-48), "BB 00 0C" for fourth 16k (48-64),
                                      ; "BB 00 10" = 16k starting at 64k boundary, etc.
0157   8E DB         MOV DS,BX  
0159   8E C3         MOV ES,BX        ; DS and ES now have BX
 
015B   BC 78 E1      MOV SP, E178 ------ offset address of 'return address' --------+
015E   90            NOP                                                            |
015F   E9 B6 FE      JMP STGTST       ; jump to IBM's 16K memory test subroutine    |
                                      ; subroutine executes a POP at the end        |
0162   74 0B         JE GOOD     <---------------------------------------+          |
                                                                         |          |
       ; 16K block bad - display fail pattern                            |          |
0164   8A D8         MOV BL,AL        ; preserve AL                      |          |
0166   B0 04         MOV AL,4         ; disable DMA controller           |          |
0168   E6 08         OUT 8,AL         ;    "     "      "                |          |
016A   8A C3         MOV AL,BL        ; restore AL                       |          |
016C   E6 80         OUT 80H,AL       ; send AL contents to POST card    |          |
016E   F4            HLT              ; halt                             |          |
                                                                         |          |
GOOD:  ; 16K block good - display "99"                                   |          |
016F   B0 04         MOV AL,4         ; disable DMA controller           |          |
0171   E6 08         OUT 8,AL         ;    "     "      "                |          |
0173   B0 99         MOV AL,99H       ; AL = 99H                         |          |
0175   E6 80         OUT 80H,AL       ; send AL contents to POST card    |          |
0177   F4            HLT              ; halt                             |          |
0178   62 E1  ---------------------------- return address ---------------+  <-------+



Note: It was found necessary to disable the DMA controller to get the POST card to display a code.



