
COMPUTREND SYSTEMS, INC.

UMC-386 (MS-3131 Ver. 1.1)

Processor         80386DX
Processor Speed   33/40MHz
Chip Set          UMC
Max. Onboard DRAM 32MB
SRAM Cache        32/64/128/256KB
BIOS              AMI
Dimensions        220mm x 220mm
I/O Options       Auxiliary keyboard connector
NPU Options       80387

[Image]

                                CONNECTIONS

  Purpose                 Location     Purpose                 Location

  External battery           J1        Turbo switch           J2/15 - 17

  Power LED & keylock     J2/1 - 5     Turbo LED              J2/12 & 13

  Speaker                J2/7 - 10     Auxiliary keyboard         KB2

  Reset switch           J2/19 & 20

                        USER CONFIGURABLE SETTINGS

                Function                    Jumper           Position

     Monitor type select monochrome          JP1              open

      Monitor type select color               JP1             closed

     NPU disabled                            JP3              open

                                              JP9              open

      NPU endabled                            JP3             closed

                                              JP9             closed

     Battery select internal                 J1            pins 2 & 3
                                                              closed

      battery select external                 J1            connected

              DRAM CONFIGURATION

      Size          Bank 0          Bank 1

      1MB         (4) 256K x 9       NONE

      2MB         (4) 256K x 9   (4) 256K x 9

      4MB         (4) 1M x 9         NONE

      8MB         (4) 1M x 9      (4) 1M x 9

      16MB        (4) 4M x 9         NONE

      32MB        (4) 4M x 9      (4) 4M x 9

                        CACHE JUMPER CONFIGURATION

  Size     JP4       JP5     JP6     JP7    JP8     JP11   JP12    JP13

  32KB     open     open     pins    pins   pins    pins   pins    open
                              2 &    1 &     1 &    2 &     1 &
                              3       2      2       3      2

  64KB     open     open     pins    pins   pins    pins   pins   closed
                              2 &    1 &     1 &    1 &     2 &
                              3       2      2       2      3

  128KB   closed    open     pins    pins   pins    pins   pins   closed
                              1 &    2 &     1 &    1 &     2 &
                              2       3      2       2      3

  256KB   closed    closed   pins    pins   pins    pins   pins   closed
                              2 &    2 &     2 &    1 &     2 &
                              3       3      3       2      3

  Note:Pins designated should be in the closed position.

                    CACHE CONFIGURATION

     Size        Cache SRAM      Location         TAG

     32KB        (4) 8K x 8       Bank 0      (1) 8K x 8

     64KB        (8) 8K x 8    Banks 0 & 1    (1) 8K x 8

     128KB      (4) 32K x 8       Bank 0      (1) 8K x 8

     256KB      (8) 32K x 8    Banks 0 & 1    (1) 32K x 8

