
NIC TECHNOLOGY, INC.

UNH433L

Processor          80386DX/80486SX/80487SX/80486DX/80486DX2
Processor Speed    20/25/33/40/50(internal)/50/66(internal)
Chip Set           UNI
Max. Onboard DRAM  32MB
SRAM Cache         32/64/128/256KB
BIOS               AMI
Dimensions         250mm x 220mm
I/O Options        32-bit proprietary local bus
NPU Options        80387SX

[Image]

                                CONNECTIONS

  Purpose                  Location     Purpose                Location

  External battery           BAT        Speaker                   SPK

  Power LED & keylock        KEYL       Turbo LED                TLED

  Reset switch               RSW        Turbo switch              TSW

  32-bit local bus card       S1

  Note:The 32-bit local bus slot cannot be used if the CPU is a 386DX or
  a 486DX-50MHz.

                        USER CONFIGURABLE SETTINGS

                Function                     Jumper          Position

     Monitor type select color               JP19             open

      Monitor type select monochrome          JP19            closed

              DRAM CONFIGURATION

      Size          Bank 0          Bank 1

      1MB         (4) 256K x 9       NONE

      2MB         (4) 256K x 9   (4) 256K x 9

      4MB         (4) 1M x 9         NONE

      8MB         (4) 1M x 9      (4) 1M x 9

      16MB        (4) 4M x 9         NONE

      20MB        (4) 1M x 9      (4) 4M x 9

      32MB        (4) 4M x 9      (4) 4M x 9

                          CPU TYPE CONFIGURATION

   Type     JP10      JP11      JP14     JP15     JP16    JP18      JP20

  80486     pins 1   closed    pins 1   pins 1   pins 1   pins 3   pins 2
             & 2                & 2      & 2      & 2      & 4      & 3

  80386     pins 2    open     pins 2   pins 2   pins 2   pins 1   pins 1
             & 3                & 3      & 3      & 3      & 2      & 2

  Note:Pins designated should be in the closed position.

                         486CPU TYPE CONFIGURATION

          Type                     JP1                      JP2

        80486DX2            pins 1 & 2 closed       pins 1 & 2 and 3 & 4
                                                           closed

         80486DX            pins 1 & 2 closed       pins 1 & 2 and 3 & 4
                                                           closed

         80487SX            pins 2 & 3 closed       pins 1 & 2 and 3 & 4
                                                           closed

         80486SX                   open              pins 2 & 3 closed

                    SRAM CONFIGURATION

     Size        Cache SRAM      Location         TAG

     32KB        (4) 8K x 8       Bank 0      (1) 8K x 8

     64KB        (8) 8K x 8    Banks 0 & 1    (1) 8K x 8

     128KB      (4) 32K x 8       Bank 0      (1) 32K x 8

     256KB      (8) 32K x 8    Banks 0 & 1    (1) 32K x 8

                         SRAM JUMPER CONFIGURATION

  Size     JP3      JP4       JP5     JP6     JP7    JP8     JP9    JP17

  32KB     open     open     open     pins    pins   pins    pins    pins
                                       2 &    2 &     1 &    2 &    2 & 3
                                       3       3      2       3

  64KB     open     open     closed   pins    pins   pins    pins    pins
                                       1 &    2 &     2 &    2 &    1 & 2
                                       2       3      3       3

  128KB    open    closed    closed   pins    pins   pins    pins    pins
                                       2 &    1 &     2 &    2 &     1&2
                                       3       2      3       3      and
                                                                     3&4

  256KB   closed   closed    closed   pins    pins   pins    pins    pins
                                       2 &    2 &     2 &    1 &     1&2
                                       3       3      3       2      and
                                                                     4&5

  Note:Pins designated should be in the closed position.

