
TMC RESEARCH CORPORATION

PCI58PV (VER 1.0A)

Processor          Pentium
Processor Speed    60/66MHz
Chip Set           OPTI
Max. Onboard DRAM  128MB
Cache              256/512KB
BIOS               Unidentified
Dimensions         330mm x 218mm
I/O Options        32-bit VESA local bus slots (3), 32-bit PCI bus slots
                   (3)
NPU Options        None

[Image]

                                CONNECTIONS

  Purpose               Location      Purpose                 Location

  External battery         J2         Reset switch           J6 (pins 9 &
                                                                 19)

  IDE interface LED        J5         IDE interface LED     J6 (pins 10 &
                                                                 20)

  Speaker              J6 (pins 1 -   32-bit VESA local       SL1 - SL3
                           4)         bus slots

  Power LED &         J6 (pins 11 -   32-bit PCI bus          PC1 - PC3
  keylock                  15)        slots

  Turbo LED            J6 (pins 8 &
                           18)

                        USER CONFIGURABLE SETTINGS

                Function                     Jumper          Position

     Battery type select internal            JP1           pins 2 & 3
                                                              closed

      Battery type select external            JP1           pins 2 & 3
                                                              closed

      CMOS memory clear                       JP1           pins 1 & 2
                                                              closed

     Monitor type select monochrome          JP2              Open

      Monitor type select color               JP2             Closed

     Back to back I/O delay enabled          JP3             Closed

      Back to back I/O delay disabled         JP3              Open

     LDEV# sample select end of 1st          JP4              Open
      T2

      LDEV# sample select end of 2nd          JP4             Closed
      T2

                DRAM CONFIGURATION

      Size            Bank 0           Bank 1

       2MB        (2) 256K x 36         NONE

       4MB        (2) 512K x 36         NONE

       6MB        (2) 256K x 36    (2) 512K x 36

       8MB         (2) 1M x 36          NONE

       8MB        (2) 512K x 36    (2) 512K x 36

      10MB        (2) 256K x 36     (2) 1M x 36

      12MB        (2) 512K x 36     (2) 1M x 36

      16MB         (2) 1M x 36      (2) 1M x 36

      16MB         (2) 2M x 36          NONE

      18MB        (2) 256K x 36     (2) 2M x 36

      20MB        (2) 512K x 36     (2) 2M x 36

      24MB         (2) 1M x 36      (2) 2M x 36

      32MB         (2) 4M x 36          NONE

      32MB         (2) 2M x 36      (2) 2M x 36

      34MB        (2) 256K x 36     (2) 4M x 36

      36MB        (2) 512K x 36     (2) 4M x 36

      40MB         (2) 1M x 36      (2) 4M x 36

      48MB         (2) 2M x 36      (2) 4M x 36

      64MB         (2) 4M x 36      (2) 4M x 36

      64MB         (2) 8M x 36          NONE

      66MB        (2) 256K x 36     (2) 8M x 36

      68MB        (2) 512K x 36     (2) 8M x 36

      72MB         (2) 1M x 36      (2) 8M x 36

      80MB         (2) 2M x 36      (2) 8M x 36

      96MB         (2) 4M x 36      (2) 8M x 36

      128MB        (2) 8M x 36      (2) 8M x 36

                    CACHE CONFIGURATION

     Size          Bank 0         Bank 1          TAG

     256KB      (8) 32K x 8        NONE       (1) 32K x 8

     512KB      (8) 32K x 8    (8) 32K x 8    (1) 32K x 8

                        CACHE JUMPER CONFIGURATION

   Size         RA16            RA17            RA18            RA19

  256KB      Installed       Installed      Not installed   Not installed

  512KB     Not installed   Not installed    Installed        Installed

                CPU SPEED CONFIGURATION

           Speed                        JP6

           60MHz                 pins 3 & 4 closed

           66MHz             pins 1 & 2, 5 & 6 closed

  VESA WAIT STATE CONFIGURATION

   Wait states          JP5

  0 wait states        Open

  1 wait state        Closed

