
UNIDENTIFIED

386-UCT, 386-UCT/Q

Processor         AM386DX/80386DX/CX486DLC
Processor Speed   40MHz
Chip Set          UMC
Max. Onboard DRAM 32MB
Cache             32/128KB
BIOS              AMI
Dimensions        220mm x 170mm
I/O Options       None
NPU Options       80387DX

[Image]

                                CONNECTIONS

  Purpose                   Location   Purpose                   Location

  External battery            J2       Turbo LED                   J6

  Reset switch                J4       Speaker                     J7

  Turbo switch                J5       Power LED & keylock         J8

                        USER CONFIGURABLE SETTINGS

                Function                    Jumper           Position

     Battery type select internal            J2            pins 2 & 3
                                                              closed

      Battery type select external            J2              Closed

     NPU disabled                            JP1           pins 2 & 3
                                                              closed

      NPU enabled                             JP1           pins 1 & 2
                                                              closed

              DRAM CONFIGURATION

      Size          Bank 0          Bank 1

      1MB         (4) 256K x 9       NONE

      2MB         (4) 256K x 9   (4) 256K x 9

      4MB         (4) 1M x 9         NONE

      5MB         (4) 256K x 9    (4) 1M x 9

      8MB         (4) 1M x 9      (4) 1M x 9

      16MB        (4) 4M x 9         NONE

      20MB        (4) 1M x 9      (4) 4M x 9

      32MB        (4) 4M x 9      (4) 4M x 9

            CACHE CONFIGURATION

     Size          Bank 0          TAG

     32KB        (4) 8K x 8    (1) 8K x 8

     128KB       (4) 32K x 8   (1) 8K x 8

       CACHE JUMPER CONFIGURATION

   Size      JP3       JP4       JP5

   32KB      Open     Open      Open

  128KB     Closed   Closed    Closed

                   CPU SPEED CONFIGURATION

        Speed                JP7                  JP8

        40MHz          pins 1 & 2 closed   pins 1 & 2 closed

          MISCELLANEOUS TECHNICAL NOTE

  Note: The location of pin 1 is unidentified.

