
mca.exe v2.0 11.22.99

General

The mca.exe program is an assembler for the Intel 8748 and 8749
microcomputers.  The program runs in MS-DOS, but I intend to compile
the program for Windows if and when DOS program support is no longer
readily available.  The program is run by entering "mca filename" on 
the DOS command line.  If the filename does not include a file 
extension, the ".asm" extension is automatically appended.

The program generates a work file ".wrk", an error file ".err"
and an object code file ".obj" which is written in Intel Hex format.
These files are generated each time the program is executed.  The 8749
instruction set is contained in the file "mca.txt" and must be
loaded each time the program is run.  Therefore, mca.txt needs to
be located in the same directory as mca.exe.

Assembler directives

     org XXX neworg XXX
	
          These two directives advance the address counter to the location
          XXX (filing the addresses passed with NOP instructions (0x00).  
          Multiple org and neworg statements can be used in the same
          program.  These are useful to avoid conditional jumps across
          page boundaries or to place look-up tables in specific locations.

      constant label XX

          Gives label the value XX

	include filename

          Opens filename and begins compiling from this file.  Very useful
          for often used subroutines and look-up tables.  The mca.exe
          program does not support nesting of include files (i.e include
          files having include files of their own).

Source code format

Constants and labels must be three to eight characters in length.
Comments must begin with a semi-colon ";".  Look-up tables may be
generated by placing a single byte value at the beginning of a series
of lines.  The program only recognizes numbers in hex format (i.e 0x00
to 0xffff).  It is suggested that source code files be created with
"edit", the DOS editor, with tabs set to five spaces.  For compatibility
with other assemblers, use of constants may be preceded by an immediate
indicator "#".


A sample of proper source code formatting for the mca.exe program
follows:

_____________
;
;  mca1.asm
;  (11.22.99)
;
; --------------------------------------
;  light controller
; --------------------------------------
;
const     turn_on   01        ; turns light on
const     turn_off  00        ; turns light off
;
          org  00             ; 
;                             ;
          mov  r1,05          ; initialize loop counter
                              ;
loop      mov  a,turn_on      ; turn light on
          outl p1,a           ;
                              ;
          call d025s          ;
                              ;
          mov  a,turn_off     ; turn light off
          outl p1,a           ;
                              ;
          call d025s          ;
                              ;
          djnz r1,loop        ; decrement and check loop counter
                              ;
end       jmp  end            ;
;
          neworg 020          ;
                              ; look-up table example
00
01
02
03
04
05
06
07
08
09
;
; ----------------------------
;  d025s subroutine
; ----------------------------
;
;    approximately 1/4 second
;    uses a, r2 and r3
;
d025s     mov r2,#ff          ; 
          mov r3,#ff          ;
          mov a,r2            ; store lower count
d025s1    mov r2,a            ; restore lower count to r2
d025s2    djnz r2,#d025s2     ; loop for standard delay
          djnz r3,#d025s1     ; after first loop completes,
          ret                 ;   will continue
                              ;
     include subfile.asm      ; file containing often used
                              ;   subroutines
                              ;

_____________

License Grant

The mca.exe program in object code and documentation are distributed
as freeware.  This means you may use and modify the materials for your own
personal use.  Additionally, you may freely distribute the materials to
others (and are encouraged to do so) provided no fee is charged for the
materials and the materials are not modified in any way.  All rights not
specifically granted herein are reserved.

If you like the program, you may become a registered user by sending
your email address and $20 to:

		John Wolfe
		82 Idora Avenue 
		San Francisco, CA 94127

A registered user will receive email notification of the availability of
future updates of the program as well as a copy of the program source code
which the user may use and modify for the user's own personal use.  Questions
and comments on the program and any bug reports should be directed to
jwolfe@bidcom.com.

LIMITATION OF LIABILITY

THE PROGRAM IS PROVIDED "AS IS" AND WITHOUT EXPRESS OR IMPLIED WARRANTY
OF ANY KIND BY THE AUTHOR OR ANYONE WHO HAS BEEN INVOLVED IN THE CREATION
OR DISTRIBUTION OF THE PROGRAM, INCLUDING, WITHOUT LIMITATION THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.

IN NO EVENT WILL THE AUTHOR OR ANY OTHER PERSON INVOLVED IN THE CREATION
OR DISTRIBUTION OF THE PROGRAM BE LIABLE TO YOU ON ACCOUNT OF ANY CLAIM FOR
ANY DIRECT, INDIRECT, SPECIAL, CONSEQUENTIAL OR EXEMPLARY DAMAGES, INCLUDING
WITHOUT LIMITATION ANY DAMAGES ASSESSED AGAINST OR PAID BY YOU TO ANY THIRD
PARTY, ARISING OUT OF THE USE, INABILITY TO USE, QUALITY OR PERFORMANCE OF
THE PROGRAM (EVEN IF THE AUTHOR OR ANY SUCH OTHER PERSON HAS BEEN ADVISED OF
THE POSSIBILITY OF SUCH DAMAGES) OR FOR ANY CLAIM BY ANY OTHER PARTY, WHETHER
SUCH CLAIM IS BASED UPON PRINCIPLES OF CONTRACT, WARRANTY, NEGLIGENCE, STRICT
LIABILITY, NEGLIGENCE OR OTHER TORT, BREACH OF ANY STATUTORY DUTY, PRINCIPLES
OF INDEMNITY OR CONTRIBUTION, THE FAILURE OF ANY REMEDY TO ACHIEVE ITS
ESSENTIAL PURPOSE OR OTHERWISE.

_____________


Intel 8749 Instruction set

The mca.exe program reads the instruction set from this file each time the
program is executed.

It should be rather easy to adapt this program to other instruction sets
by updating the instruction set and modifying the source code as needed.
Immediate and 8 bit address instructions must be at the end of list of
each instruction type.

          Codes:    $ = 8 bit address
                    ! = 11 bit address
                    % = no operand
                    # = immediate to follow

---
ADD     A,R0    68      1
ADD     A,R1    69      1
ADD     A,R2    6A      1
ADD     A,R3    6B      1
ADD     A,R4    6C      1
ADD     A,R5    6D      1
ADD     A,R6    6E      1
ADD     A,R7    6F      1
ADD     A,@R0   60      1
ADD     A,@R1   61      1
ADD     A,#     03      2
ADDC    A,R0    78      1
ADDC    A,R1    79      1
ADDC    A,R2    7A      1
ADDC    A,R3    7B      1
ADDC    A,R4    7C      1
ADDC    A,R5    7D      1
ADDC    A,R6    7E      1
ADDC    A,R7    7F      1
ADDC    A,@R1   70      1
ADDC    A,@R2   71      1
ADDC    A,#     13      2
ANL     A,R0    58      1
ANL     A,R1    59      1
ANL     A,R2    5A      1
ANL     A,R3    5B      1
ANL     A,R4    5C      1
ANL     A,R5    5D      1
ANL     A,R6    5E      1
ANL     A,R7    5F      1
ANL     A,@R0   50      1
ANL     A,@R1   51      1
ANL     A,#     53      2
ANL     BUS,#   98      2
ANL     P1,#    99      2
ANL     P2,#    9A      2
ANLD    P4,A    9C      1
ANLD    P5,A    9D      1
ANLD    P6,A    9E      1
ANLD    P7,A    9F      1
CALL    !       14      2
CLR     A       27      1
CLR     C       97      1
CLR     F1      A5      1
CLR     F0      85      1
CPL     A       37      1
CPL     C       A7      1
CPL     F0      95      1
CPL     F1      B5      1
DA      A       57      1
DEC     A       07      1
DEC     R0      C8      1
DEC     R1      C9      1
DEC     R2      CA      1
DEC     R3      CB      1
DEC     R4      CC      1
DEC     R5      CD      1
DEC     R6      CE      1
DEC     R7      CF      1
DIS     I       15      1
DIS     TCNTI   35      1
DJNZ    R0,$    E8      2
DJNZ    R1,$    E9      2
DJNZ    R2,$    EA      2
DJNZ    R3,$    EB      2
DJNZ    R4,$    EC      2
DJNZ    R5,$    ED      2
DJNZ    R6,$    EE      2
DJNZ    R7,$    EF      2
EN      I       05      1
EN      TCNTI   25      1
ENTO    CLK     75      1
IN      A,P1    09      1
IN      A,P2    0A      1
INC     A       17      1
INC     R0      18      1
INC     R1      19      1
INC     R2      1A      1
INC     R3      1B      1
INC     R4      1C      1
INC     R5      1D      1
INC     R6      1E      1
INC     R7      1F      1
INC     @R0     10      1
INC     @R1     11      1
INS     A,BUS   08      1
JB0     $       12      2
JB1     $       32      2
JB2     $       52      2
JB3     $       72      2
JB4     $       92      2
JB5     $       B2      2
JB6     $       D2      2
JB7     $       F2      2
JC      $       F6      2
JF0     $       B6      2
JF1     $       76      2
JMP     !       04      2
JMPP    @A      B3      1
JNC     $       E6      2
JNI     $       86      2
JNT0    $       26      2
JNT1    $       46      2
JNZ     $       96      2
JTF     $       16      2
JT0     $       36      2
JT1     $       56      2
JZ      $       C6      2
MOV     A,PSW   C7      1
MOV     A,R0    F8      1
MOV     A,R1    F9      1
MOV     A,R2    FA      1
MOV     A,R3    FB      1
MOV     A,R4    FC      1
MOV     A,R5    FD      1
MOV     A,R6    FE      1
MOV     A,R7    FF      1
MOV     A,@R0   F0      1
MOV     A,@R1   F1      1
MOV     A,T     42      1
MOV     A,#     23      2
MOV     PSW,A   D7      1
MOV     R0,A    A8      1
MOV     R1,A    A9      1
MOV     R2,A    AA      1
MOV     R3,A    AB      1
MOV     R4,A    AC      1
MOV     R5,A    AD      1
MOV     R6,A    AE      1
MOV     R7,A    AF      1
MOV     R0,#    B8      2
MOV     R1,#    B9      2
MOV     R2,#    BA      2
MOV     R3,#    BB      2
MOV     R4,#    BC      2
MOV     R5,#    BD      2
MOV     R6,#    BE      2
MOV     R7,#    BF      2
MOV     @R0,A   A0      1
MOV     @R1,A   A1      1
MOV     @R0,#   B0      2
MOV     @R1,#   B1      2
MOV     T,A     62      1
MOVD    A,P4    0C      1
MOVD    A,P5    0D      1
MOVD    A,P6    0E      1
MOVD    A,P7    0F      1
MOVD    P4,A    3C      1
MOVD    P5,A    3D      1
MOVD    P6,A    3E      1
MOVD    P7,A    3F      1
MOVP    A,@A    A3      1
MOVP3   A,@A    E3      1
MOVX    A,@R0   80      1
MOVX    A,@R1   81      1
MOVX    @R0,A   90      1
MOVX    @R1,A   91      1
NOP     %       00      1
ORL     A,R0    48      1
ORL     A,R1    49      1
ORL     A,R2    4A      1
ORL     A,R3    4B      1
ORL     A,R4    4C      1
ORL     A,R5    4D      1
ORL     A,R6    4E      1
ORL     A,R7    4F      1
ORL     A,@R0   40      1
ORL     A,@R1   41      1
ORL     A,#     43      2
ORL     BUS,#   88      2
ORL     P1,#    89      2
ORL     P2,#    8A      2
ORLD    P4,A    8C      1
ORLD    P5,A    8D      1
ORLD    P6,A    8E      1
ORLD    P7,A    8F      1
OUTL    BUS,A   02      1
OUTL    P1,A    39      1
OUTL    P2,A    3A      1
RET     %       83      1
RETR    %       93      1
RL      A       E7      1
RLC     A       F7      1
RR      A       77      1
RRC     A       67      1
SEL     MB0     E5      1
SEL     MB1     F5      1
SEL     RB0     C5      1
SEL     RB1     D5      1
STOP    TCNT    65      1
STRT    CNT     45      1
STRT    T       55      1
SWAP    A       47      1
XCH     A,R0    28      1
XCH     A,R1    29      1
XCH     A,R2    2A      1
XCH     A,R3    2B      1
XCH     A,R4    2C      1
XCH     A,R5    2D      1
XCH     A,R6    2E      1
XCH     A,R7    2F      1
XCH     A,@R0   20      1
XCH     A,@R1   21      1
XCHD    A,@R0   30      1
XCHD    A,@R1   31      1
XRL     A,R0    D8      1
XRL     A,R1    D9      1
XRL     A,R2    DA      1
XRL     A,R3    DB      1
XRL     A,R4    DC      1
XRL     A,R5    DD      1
XRL     A,R6    DE      1
XRL     A,R7    DF      1
XRL     A,@R0   D0      1
XRL     A,@R1   D1      1
XRL     A,#     D3      2
