# makefile generated by MakeMake...

TARGET = b.exe
OBJECTS = b1.o b2.o b3.o

CC = gcc
CFLAGS = -O3 -Wall -g
LIBS = 

all: $(TARGET)

$(TARGET): $(OBJECTS)
	$(CC) $(CFLAGS) -o $(TARGET) $(OBJECTS) $(LIBS)

b1.o: b1.c b.h
	$(CC) $(CFLAGS) -c b1.c

b2.o: b2.c b.h
	$(CC) $(CFLAGS) -c b2.c

b3.o: b3.c b.h
	$(CC) $(CFLAGS) -c b3.c

clean:
	rm -f $(TARGET) $(OBJECTS)
